1. Field of the Invention
The present invention relates to a semiconductor device supporting a signal line of a high speed input/output (I/O) such as GHz band and more particularly, to a disposition structure of a signal line formed on a wiring board constituting a semiconductor chip or package located in the vicinity of a reference potential plane such as a ground (GND) plane.
2. Related Background Art
In recent years, the number of specifications of high speed interfaces in which a high speed signal of some hundreds of MHz, the GHz band or 10 GHz passes through outside of a semiconductor chip such as a package, a board or the like-has increased. As the operation frequency becomes higher and rise time or fall time of the signal becomes shorter, it is necessary to design a pattern of a package which is conventionally handled as a lumped constant while taking, into consideration, impedance and transmission delay time as a transfer path.
Conventionally, the reference potential plane such as the ground (GND) plane disposed under such a high speed signal line is not usually provided with a large slit which causes impedance mismatch and blocks a feedback current path.
A large slit in view of electromagnetic interference (EMI) can not usually enter the GND plane provided directly below the transfer line on the board or package. Especially on the transfer line in which impedance is controlled, a reference GND plane is not provided with a notch. It is conventionally known that if the GND plane is provided with a slit, the speed of a propagating wave is reduced.
Japanese Patent Laid-Open Publication No. 2003-273620 described a portable electronic apparatus which comprises an antenna for sending and receiving radio wave, a circuit board which has the antenna and which is disposed in the longitudinal direction of the antenna, and a reactance component loading unit provided on the circuit board for securing a line length for an image current of one-quarter wavelength (λ/4) flowing through the ground of the circuit board in the longitudinal direction of the antenna, the reactance component loading unit comprises a slit. By providing the slit, a ground board length L4 can be adjusted such that it becomes a λ/4 line length, and the ground board length L4 is set such that the length L4 corresponds to an ideal ground board length L2. With this, it is possible to prevent the frequency of the antenna from deviating and to prevent the voltage standing wave ratio (VSWR) characteristics from deteriorating.
On the other hand, when the opposed reference potential plane exists in the vicinity of the signal line, a semiconductor device capable of generating signal transfer delay without providing a delay element on the side of the signal line and capable of easily forming an equivalent delay element on a wiring board constituting the semiconductor chip or package is required.